The 74LS74 is a dual positive edge triggered D-type flip-flop. It has individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQ outputs. Data at the nD-input, that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition, is stored in the flip-flop and appears at the nQ output. Schmitt-trigger action in the clock input, makes the circuit highly tolerant to slower clock rise and fall times. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

NOTE: HC version is the high speed CMOS version which we may supply due to availability. It is fully compatible with LS version and one to one replaceable (not vice versa as HC version has more features)

Datasheet:

LS: https://www.ti.com/lit/ds/symlink/sn54ls74a-sp.pdf

HC: https://www.ti.com/lit/ds/symlink/sn74hc74.pdf