Specifications:

• CD4026B and CD4033B each consist of a 5-stage Johnson decade counter and an output decoder which converts the Johnson code to a 7-segment decoder output for driving one stage in a numerical display.
• These devices are particularly advantageous in display applications where low power dissipation and /or low package count are important.
• Inputs common to both types are CLOCK, RESET, & CLOCK INHIBIT; common outputs are CARRY OUT and the seven decoded outputs (a, b, c, d, e, f, g). Additional inputs and outputs for the CD4026B include DISPLAY ENABLE input and DISPLAY ENABLE and UNGATED "C-SEGMENT" outputs. Signals peculiar to the CD4033B are RIPPLE-BLANKING INPUT AND LAMP TEST INPUT and a RIPPLE-BLANKING OUTPUT.

Features:

• Counter and 7-segment decoding in one package
• Easily interfaced with 7-segment display types
• Fully static counter operation: DC to 6 MHz (typ.) at VDD = 10 V
• Ideal for low-power displays
• Display enable output (CD4026B)
• "Ripple blanking" and lamp test (CD4033B)
• 100% tested for quiescent current at 20 V
• Standardized, symmetrical output characteristics
• 5-V, 10-V, and 15-V parametric ratings
• Schmitt-triggered clock inputs
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
• Applications
  • Decade counting 7-segment decimal display
  • Frequency division 7-segment decimal displays
  • Clocks, watches, timers (e.g. ÷60, ÷60, ÷ 12 counter/display)
  • Counter/display driver for meter applications

Package: PDIP-16

Link to datasheet: Datasheet